Be careful about ESD and surge

Last Updated: Thursday, 12 June 2014

Be careful about ESD and surge

 

Semiconductors are very sensitive to ESD and surge.
Especially, FPGAs are manufactured with very fine processing technology and very vulnerable to ESD.

In our FPGA boards, FPGA I/O pins are connected to board's pads and connectors directly. When you use our FPGA boards, please be careful like as you touch bare FPGA device.


Mental attitude for EDS protection

  • Touch the desk which your FPGA board is put on to eliminate the electrical difference between your body and it.
  • Have a handshake before you pass your FPGA board to other person.
  • Use anti-electricity materials for packing.
  • Prepare anti-electricity environment (mat, carpet, chair, hand glove, and etc,.)
  • Connect all ground before you use oscilloscope, logic analyzer, download cable or etc,.
  • Do not hot-plug for download cables and I/O connectors.

In some cases, ground voltage between not-grounded-each-other equipments is observed 100V or more.
There are cased where parallel ports and USB ports are destroyed when it attached by connectors.

Have you seen that your FPGA boards or microcomputers have a glitch when you connect them to oscilloscope or logic analyzer?
Have you seen that your oscilloscope triggers when you just sit on chair or stand up?
 


How much ESD threshold of FPGA?

The higher spec of FPGAs, the more fine process technology is used. RS-232C transceivers are tolerant of +/-15,000V or more in human model. But FPGAs are tolerant of +/- 2000V or less.
It is said that electrical voltage from 3,000V to 10,000V would be observed when you hear a snick sound of ESD.


Example picture of a semiconductor destroyed by ESD.  (This is not FPGA)


Reference Page

Wikipedia: Electrostatic-sensitive device
https://en.wikipedia.org/wiki/Electrostatic_sensitive_device

 


 

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